A technical guide to silicon photomultipliers (MPPC) - Overview

Silicon photomultipliers from Hamamatsu are called Multi-Pixel Photon Counters (MPPC). This extensive guide to MPPCs describes the device's operating principle, its performance parameters, and how to measure various characteristics such as gain, breakdown voltage, photon detection efficiency, and linearity. Also included is a detector selection case study where, for a given set of measurement conditions, the signal-to-noise ratio and linearity of an avalanche photodiode and an MPPC are calculated and compared.

Table of Contents:

Section 1: Operation principles and characteristics

1-1. The PN junction & unity-gain Si photodiodes
1-2. Avalanche photodiodes (APD)
1-3. MPPC (Multi-Pixel Photon Counter)

Section 2: APD & MPPC performance parameters

2-1. Signal
2-2. Noise
2-3. Signal-to-noise ratio (S/N)
2-4. Linearity
2-5. Dynamic range
2-6. Time response
2-7. Time resolution

Section 3: Case studies of APD/MPPC performance calculations

3-1. Calculating an MPPC's signal-to-noise ratio
3-2. Calculating an MPPC's linearity
3-3. Calculating an APD's signal-to-noise ratio
3-4. Calculating an APD's linearity
3-5. Conclusion

Section 4: MPPC characterization measurements

4-1. Gain and breakdown voltage
4-2. Breakdown voltage measurement by obtaining Vpeak from I-V curve
4-3. Photon detection efficiency (PDE) vs. bias voltage measurement
4-4. Dark count rate (DCR) and prompt crosstalk measurement using counter and CR filter
4-5. Measurement of DCR, prompt crosstalk, recovery time, afterpulsing, and delayed crosstalk using digitizer and digital pulse processing
4-6. Single-photon pulse shape measurement
4-7. Time resolution: coincidence time resolution (CTR) and single photon time resolution (SPTR)
4-8. Dynamic range and linearity

Overview: Silicon as a photodetector technology

Over recent years, various optical applications have experienced a shift in their optimal choice of photodetector technology. This shift has followed a general trend away from the vacuum-based photomultiplier tube (PMT) towards solid-state silicon photodetectors. In addition to the greater cost efficiency of silicon device microfabrication and scalability of wafer processing, several technological advantages based on physical properties of silicon photodetectors have contributed to that trend:

- Considering silicon’s narrow bandgap (1.14 eV) and due to higher transition probability of a photoelectron from a silicon crystal’s valence band to its conduction band than emission probability of a photoelectron from an alkali-based photocathode to the vacuum level, silicon photodetectors can attain higher quantum efficiencies over a wider range of wavelengths (UV-VIS-NIR) than the PMT.

- Silicon’s semiconductor properties and crystalline structure allow for formation of extrinsically-doped regions that can be depleted of charge carriers (electrons or holes) in presence of an electric field, hence diminishing carrier recombination. This, along with high (excess) carrier drift velocity in the depleted regions, provides for a higher collection efficiency of photoelectron charge (i.e. less photoelectric signal loss) than the likelihood of a photoelectron creating secondary electron emissions in bombarding a PMT’s first dynode.

- Fine feature sizes attainable by modern silicon microfabrication processing allow the implementation of micron-sized PN junctions and anode/cathode regions. Combined with high electrical conductance of doped silicon, that permits the formation of strong electric field (E-field) intensities within a silicon detector’s depletion layer. This enables low-voltage operation of silicon photodetectors at low supply currents, resulting in low power consumption. Furthermore, at sufficiently strong E-field intensities, a high carrier multiplication or avalanche gain within small physical dimensions of a silicon device is made possible; this internal gain mechanism is fundamental to increasing the signal level to above the noise floor of an output amplifier for signal readout. Additionally, small PN junction and anode/cathode physical dimensions result in small junction capacitance, which facilitates high-frequency response.

- When a photosensitive area larger than what monolithic chips (as restricted by wafer size) can accommodate is required, compactness of silicon photodetectors with a high fill-factor (i.e. ratio of photosensitive area to total area) permits the construction of large focal-plane arrays of tiled chips with ultrahigh (≤200 μm of dead gap) packing-efficiency.

- Silicon photodetectors are mechanically rugged and are not hampered by effects of magnetic field, hysteresis, and aging/warmup considerations unlike PMTs.

- Despite the above strengths of silicon photodetectors, it should be noted that the PMT has lower dark current output per unit of photosensitive area, less capacitance per unit of area, and greater radiation hardness.

- It is also noteworthy to add that silicon is the material of choice for VLSI microelectronic fabrication of mixed-signal (analog + digital) ICs, based specifically on CMOS transistors that are essential to implementation of modern signal processing schemes. Furthermore, silicon’s native oxide has excellent light transmittance while silicon itself is opaque; this enables microfabrication of mirrors, waveguides, and gratings on silicon wafers. Additionally, since silicon has remarkable mechanical strength and rigidity, various three-dimensional dynamic (actuators, oscillators, etc.) or static (capacitors, inductors, bonding and anchoring pads, and other fixtures) structures can be constructed on silicon wafers via wet or dry etching processes based on particular lattice orientations. These fabrication technologies lead to integration of silicon photodetectors into MOEMS (micro-opto-electro-mechanical systems) products with tremendous potential in a wide variety of optical applications that demand large-scale cost-effective manufacturing, dimensional miniaturization, and ultralow power consumption; a similar integration of PMT is not possible due to its inherent dimensional and power-consumption limitations. Altogether, a technological revolution, known as Lab-on-Chip (LoC), of micron-scale wafer-level integration of optical measurement, photoelectric signal processing, and digital data output with enormous potential in biomedical, scientific/analytical, industrial, and consumer markets is underway as a result.

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